Difference between Von Neumann and Harvard Architecture

There are two types of digital computer architectures that describe the functionality and implementation of computer systems. One is the Von Neumann architecture that was designed by the renowned physicist and mathematician John Von Neumann in the late 1940s, and the other one is the Harvard architecture which was based on the original Harvard Mark I relay-based computer which employed separate memory systems to store data and instructions.

The original Harvard architecture used to store instructions on punched tape and data in electro-mechanical counters. The Von Neumann architecture forms the basis of modern computing and is easier to implement. This article looks at the two computer architectures individually and explains the difference between the two.

What is Von Neumann Architecture?

It’s a theoretical design based on the concept of stored-program computers where program data and instruction data are stored in the same memory.

The architecture was designed by the renowned mathematician and physicist John Von Neumann in 1945. Until the Von Neumann concept of computer design, computing machines were designed for a single predetermined purpose that would lack sophistication because of the manual rewiring of circuitry.

The idea behind the Von Neumann architectures is the ability to store instructions in the memory along with the data on which the instructions operate. In short, the Von Neumann architecture refers to a general framework that a computer’s hardware, programming, and data should follow.

The Von Neumann architecture consists of three distinct components: a central processing unit (CPU), memory unit, and input/output (I/O) interfaces. The CPU is the heart of the computer system that consists of three main components: the Arithmetic and Logic Unit (ALU), the control unit (CU), and registers.

The ALU is responsible for carrying out all arithmetic and logic operations on data, whereas the control unit determines the order of flow of instructions that need to be executed in programs by issuing control signals to the hardware.

The registers are basically temporary storage locations that store addresses of the instructions that need to be executed. The memory unit consist of RAM, which is the main memory used to store program data and instructions. The I/O interfaces allows the users to communicate with the outside world such as storage devices.

What is Harvard Architecture?

It is a computer architecture with physically separate storage and signal pathways for program data and instructions. Unlike Von Neumann architecture which employs a single bus to both fetch instructions from memory and transfer data from one part of a computer to another, Harvard architecture has separate memory space for data and instruction.

Both the concepts are similar except the way they access memories. The idea behind the Harvard architecture is to split the memory into two parts – one for data and another for programs. The terms was based on the original Harvard Mark I relay based computer which employed a system that would allow both data and transfers and instruction fetches to be performed at the same time.

Real world computer designs are actually based on modified Harvard architecture and are commonly used in microcontrollers and DSP (Digital Signal Processing).

Difference between Von Neumann and Harvard Architecture

Basics of Von Neumann and Harvard Architecture

The Von Neumann architecture is a theoretical computer design based on the concept of stored-program where programs and data are stored in the same memory. The concept was designed by a mathematician John Von Neumann in 1945 and which presently serves as the basis of almost all modern computers. The Harvard architecture was based on the original Harvard Mark I relay-based computer model which employed separate buses for data and instructions.

Memory System of Von Neumann and Harvard Architecture

The Von Neumann architecture has only one bus that is used for both instruction fetches and data transfers, and the operations must be scheduled because they cannot be performed at the same time. The Harvard architecture, on the other hand, has separate memory space for instructions and data, which physically separate signals and storage for code and data memory, which in turn makes it possible to access each of the memory system simultaneously.

Instruction Processing of Von Neumann and Harvard Architecture

In Von Neumann architecture, the processing unit would need two clock cycles to complete an instruction. The processor fetches the instruction from memory in the first cycle and decodes it, and then the data is taken from memory in the second cycle. In the Harvard architecture, the processing unit can complete an instruction in one cycle if appropriate pipelining strategies are in place.

Cost of Von Neumann and Harvard Architecture

As instructions and data use the same bus system in the Von Neumann architecture, it simplifies design and development of the control unit, which eventually brings down the production cost to minimal. Development of control unit in the Harvard architecture is more expensive than the former because of the complex architecture that employs two buses for instructions and data.

Use of Von Neumann and Harvard Architecture

Von Neumann architecture is mainly used in every machine you see from desktop computers and notebooks to high performance computers and workstations. Harvard architecture is a fairly new concept used primarily in microcontrollers and digital signal processing (DSP).

Von Neumann vs. Harvard Architecture: Comparison Chart

Summary of Von Neumann vs. Harvard Architecture

Von Neumann architecture is similar to the Harvard architecture except it uses a single bus to perform both instruction fetches and data transfers, so the operations must be scheduled. The Harvard architecture, on the other hand, uses two separate memory addresses for data and instructions, which makes it possible to feed data into both the busses at the same time. However, the complex architecture only adds to the development cost of the control unit against the lower development cost of the less complex Von Neumann architecture which employs a single unified cache.

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